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FPGA implementation of a delay-line readout system for a particle detector
journal contribution
posted on 2023-06-08, 09:24 authored by G Seferiadis, M Pouchet, M P GoughNo description supplied
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Publication status
- Published
Journal
MeasurementISSN
0263-2241Issue
1Volume
39Page range
pp 90-99Pages
10.0Department affiliated with
- Engineering and Design Publications
Notes
This paper presents a novel time to digital conversion architecture implemented in a Field Programmable Gate Array. Designed for the CORES space instrument, the high resolution, speed and low chip useage is applicable to a wide range of instruments. CORES is part of the Obstanovka Experiment Complex scheduled to be attached to the outside of the International Space Station in 2008. Obstanovka (Environment) is a Russian/ Ukranian project with invited participation from the UK, Poland, Hungary, Bulgaria, and Sweden. The project websites are: http://www.iki.rssi.ru/obstanovka/eng/index.htm and http://www.rmki.kfki.hu/tfo/iss/ . Obstanovka Principal Investigators Staz Klimov (sklimov@iki.rssi.ru) and Valery Korepanov ( Vakor@isr.lviv.ua ).Full text available
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Peer reviewed?
- Yes
Legacy Posted Date
2012-02-06Usage metrics
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