Architecture and Instruction Set Design of an ATM Network Processor

Stipidis, Elias and Jones, Gary (2003) Architecture and Instruction Set Design of an ATM Network Processor. Microprocessors and Microsystems, 27 (8). pp. 367-379. ISSN 0141-9331

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Microprocessor architectures are diversifying to support niche market requirements, with growing emphasis for performance delivery on the architectural design rather than the silicon implementation. This paper outlines the architectural design, programmer's model and instruction set of a microprocessor, which adopts a novel approach to network data. In particular, Asynchronous Transfer Mode (ATM) cells are delivered to a special FIFO cache memory, located at the heart of the processor. Cell input and output is conducted at wire speed using dedicated streaming input and output hardware. Special read and write instructions then allow the cell payloads to be accessed directly, and transferred from/to the register file. Multimedia applications have previously been identified as an important market for such a network centric architecture. Therefore the paper ends with a demonstration of the power of some key instructions. A motion estimation kernel from the MPEG standard is used to exercise the architecture and instruction set. Execution speed is shown to be comparable to today's processors, using only a 400 MHz clock for a full search. The minimally resourced design is therefore suited to embedded network applications from both economic and performance standpoints.

Item Type: Article
Additional Information: The research paper is one of the first papers published describing System-on-Chip for network processors to provide Network Quality-of-Service to the desktop. The combination of software protocol stacks with hardware acceleration and process segmentation for end-to-end QoS in a single chip was a totally new concept that is now deployed in backbone networks and edge routers. This novel work was one of the subjects E.Stipidis was invited to present to Venture Capitalist companies in California/USA and London/UK in 2003, contact for USA/UK London Sustainability Exchange Chairman, 02086619198
Schools and Departments: School of Engineering and Informatics > Engineering and Design
Depositing User: Elias Stipidis
Date Deposited: 06 Feb 2012 19:02
Last Modified: 06 Feb 2012 21:37
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