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Architecture and Instruction Set Design of an ATM Network Processor

journal contribution
posted on 2023-06-07, 21:50 authored by Elias Stipidis, Gary Jones
Microprocessor architectures are diversifying to support niche market requirements, with growing emphasis for performance delivery on the architectural design rather than the silicon implementation. This paper outlines the architectural design, programmer's model and instruction set of a microprocessor, which adopts a novel approach to network data. In particular, Asynchronous Transfer Mode (ATM) cells are delivered to a special FIFO cache memory, located at the heart of the processor. Cell input and output is conducted at wire speed using dedicated streaming input and output hardware. Special read and write instructions then allow the cell payloads to be accessed directly, and transferred from/to the register file. Multimedia applications have previously been identified as an important market for such a network centric architecture. Therefore the paper ends with a demonstration of the power of some key instructions. A motion estimation kernel from the MPEG standard is used to exercise the architecture and instruction set. Execution speed is shown to be comparable to today's processors, using only a 400 MHz clock for a full search. The minimally resourced design is therefore suited to embedded network applications from both economic and performance standpoints.

History

Publication status

  • Published

Journal

Microprocessors and Microsystems

ISSN

0141-9331

Issue

8

Volume

27

Page range

367-379

Pages

13.0

Department affiliated with

  • Engineering and Design Publications

Notes

The research paper is one of the first papers published describing System-on-Chip for network processors to provide Network Quality-of-Service to the desktop. The combination of software protocol stacks with hardware acceleration and process segmentation for end-to-end QoS in a single chip was a totally new concept that is now deployed in backbone networks and edge routers. This novel work was one of the subjects E.Stipidis was invited to present to Venture Capitalist companies in California/USA and London/UK in 2003, contact for USA/UK London Sustainability Exchange Chairman ramgidoomal@blueyonder.co.uk, 02086619198

Full text available

  • No

Peer reviewed?

  • Yes

Legacy Posted Date

2012-02-06

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